1 from nmigen
.compat
.sim
import run_simulation
3 from soc
.TLB
.PermissionValidator
import PermissionValidator
5 from soc
.TestUtil
.test_helper
import assert_op
8 def set_validator(dut
, d
, xwr
, sm
, sa
, asid
):
11 yield dut
.super_mode
.eq(sm
)
12 yield dut
.super_access
.eq(sa
)
13 yield dut
.asid
.eq(asid
)
17 def check_valid(dut
, v
, op
):
18 out_v
= yield dut
.valid
19 assert_op("Valid", out_v
, v
, op
)
23 # 80 bits represented. Ignore the MSB as it will be truncated
24 # ASID is bits first 4 hex values (bits 64 - 78)
26 # Test user mode entry valid
27 # Global Bit matching ASID
28 # Ensure that user mode and valid is enabled!
29 data
= 0x7FFF0000000000000031
30 # Ignore MSB it will be truncated
36 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
37 yield from check_valid(dut
, valid
, 0)
39 # Test user mode entry valid
40 # Global Bit nonmatching ASID
41 # Ensure that user mode and valid is enabled!
42 data
= 0x7FFF0000000000000031
43 # Ignore MSB it will be truncated
49 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
50 yield from check_valid(dut
, valid
, 0)
52 # Test user mode entry invalid
53 # Global Bit nonmatching ASID
54 # Ensure that user mode and valid is enabled!
55 data
= 0x7FFF0000000000000021
56 # Ignore MSB it will be truncated
62 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
63 yield from check_valid(dut
, valid
, 0)
65 # Test user mode entry valid
66 # Ensure that user mode and valid is enabled!
67 data
= 0x7FFF0000000000000011
68 # Ignore MSB it will be truncated
74 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
75 yield from check_valid(dut
, valid
, 0)
77 # Test user mode entry invalid
78 # Ensure that user mode and valid is enabled!
79 data
= 0x7FFF0000000000000011
80 # Ignore MSB it will be truncated
86 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
87 yield from check_valid(dut
, valid
, 0)
89 # Test supervisor mode entry valid
90 # The entry is NOT in user mode
91 # Ensure that user mode and valid is enabled!
92 data
= 0x7FFF0000000000000001
93 # Ignore MSB it will be truncated
99 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
100 yield from check_valid(dut
, valid
, 0)
102 # Test supervisor mode entry invalid
103 # The entry is in user mode
104 # Ensure that user mode and valid is enabled!
105 data
= 0x7FFF0000000000000011
106 # Ignore MSB it will be truncated
112 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
113 yield from check_valid(dut
, valid
, 0)
115 # Test supervisor mode entry valid
116 # The entry is NOT in user mode with access
117 # Ensure that user mode and valid is enabled!
118 data
= 0x7FFF0000000000000001
119 # Ignore MSB it will be truncated
125 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
126 yield from check_valid(dut
, valid
, 0)
128 # Test supervisor mode entry valid
129 # The entry is in user mode with access
130 # Ensure that user mode and valid is enabled!
131 data
= 0x7FFF0000000000000011
132 # Ignore MSB it will be truncated
138 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
139 yield from check_valid(dut
, valid
, 0)
143 dut
= PermissionValidator(15, 64)
144 run_simulation(dut
, tbench(
145 dut
), vcd_name
="Waveforms/test_permission_validator.vcd")
146 print("PermissionValidator Unit Test Success")
149 if __name__
== "__main__":