1 from functools
import wraps
2 from soc
.decoder
.orderedset
import OrderedSet
3 from soc
.decoder
.selectable_int
import SelectableInt
, selectconcat
4 from collections
import namedtuple
7 instruction_info
= namedtuple('instruction_info',
8 'func read_regs uninit_regs write_regs op_fields form asmregs')
11 def create_args(reglist
, extra
=None):
23 def __init__(self
, bytes_per_word
=8):
25 self
.bytes_per_word
= bytes_per_word
26 self
.word_log2
= math
.ceil(math
.log2(bytes_per_word
))
28 def _get_shifter_mask(self
, width
, remainder
):
29 shifter
= ((self
.bytes_per_word
- width
) - remainder
) * \
31 mask
= (1 << (width
* 8)) - 1
34 # TODO: Implement ld/st of lesser width
35 def ld(self
, address
, width
=8):
36 remainder
= address
& (self
.bytes_per_word
- 1)
37 address
= address
>> self
.word_log2
38 assert remainder
& (width
- 1) == 0, "Unaligned access unsupported!"
39 if address
in self
.mem
:
40 val
= self
.mem
[address
]
44 if width
!= self
.bytes_per_word
:
45 shifter
, mask
= self
._get
_shifter
_mask
(width
, remainder
)
46 val
= val
& (mask
<< shifter
)
48 print("Read {:x} from addr {:x}".format(val
, address
))
51 def st(self
, address
, value
, width
=8):
52 remainder
= address
& (self
.bytes_per_word
- 1)
53 address
= address
>> self
.word_log2
54 assert remainder
& (width
- 1) == 0, "Unaligned access unsupported!"
55 print("Writing {:x} to addr {:x}".format(value
, address
))
56 if width
!= self
.bytes_per_word
:
57 if address
in self
.mem
:
58 val
= self
.mem
[address
]
61 shifter
, mask
= self
._get
_shifter
_mask
(width
, remainder
)
62 val
&= ~
(mask
<< shifter
)
63 val |
= value
<< shifter
64 self
.mem
[address
] = val
66 self
.mem
[address
] = value
68 def __call__(self
, addr
, sz
):
69 val
= self
.ld(addr
.value
, sz
)
70 print ("memread", addr
, sz
, val
)
71 return SelectableInt(val
, sz
*8)
73 def memassign(self
, addr
, sz
, val
):
74 print ("memassign", addr
, sz
, val
)
75 self
.st(addr
.value
, val
.value
, sz
)
79 def __init__(self
, decoder
, regfile
):
83 self
[i
] = SelectableInt(regfile
[i
], 64)
85 def __call__(self
, ridx
):
88 def set_form(self
, form
):
92 #rnum = rnum.value # only SelectableInt allowed
93 print("GPR getzero", rnum
)
95 return SelectableInt(0, 64)
98 def _get_regnum(self
, attr
):
99 getform
= self
.sd
.sigforms
[self
.form
]
100 rnum
= getattr(getform
, attr
)
103 def ___getitem__(self
, attr
):
104 print("GPR getitem", attr
)
105 rnum
= self
._get
_regnum
(attr
)
106 return self
.regfile
[rnum
]
109 for i
in range(0, len(self
), 8):
112 s
.append("%08x" % self
[i
+j
].value
)
114 print("reg", "%2d" % i
, s
)
117 def __init__(self
, pc_init
=0):
118 self
.CIA
= SelectableInt(pc_init
, 64)
119 self
.NIA
= self
.CIA
+ SelectableInt(4, 64)
121 def update(self
, namespace
):
123 self
.NIA
= self
.CIA
+ SelectableInt(4, 64)
124 namespace
['CIA'] = self
.CIA
125 namespace
['NIA'] = self
.NIA
129 # decoder2 - an instance of power_decoder2
130 # regfile - a list of initial values for the registers
131 def __init__(self
, decoder2
, regfile
):
132 self
.gpr
= GPR(decoder2
, regfile
)
136 # 4.4.4 III p971 SPR (same as GPR except for SPRs - best done as a dict
137 # FPR (same as GPR except for FP nums)
139 # 2.3.1 CR (and sub-fields CR0..CR6)
142 # 2.3.4 TAR (SPR #815)
143 # 3.2.2 p45 XER (SPR #0)
144 # 3.2.3 p46 p232 VRSAVE (SPR #256)
146 self
.namespace
= {'GPR': self
.gpr
,
148 'memassign': self
.memassign
,
153 self
.decoder
= decoder2
155 def memassign(self
, ea
, sz
, val
):
156 self
.mem
.memassign(ea
, sz
, val
)
158 def prep_namespace(self
, formname
, op_fields
):
159 # TODO: get field names from form in decoder*1* (not decoder2)
160 # decoder2 is hand-created, and decoder1.sigform is auto-generated
162 # then "yield" fields only from op_fields rather than hard-coded
164 fields
= self
.decoder
.sigforms
[formname
]
165 for name
in fields
._fields
:
166 if name
not in ["RA", "RB", "RT"]:
167 sig
= getattr(fields
, name
)
169 self
.namespace
[name
] = SelectableInt(val
, sig
.width
)
171 def call(self
, name
):
172 # TODO, asmregs is from the spec, e.g. add RT,RA,RB
173 # see http://bugs.libre-riscv.org/show_bug.cgi?id=282
174 info
= self
.instrs
[name
]
175 yield from self
.prep_namespace(info
.form
, info
.op_fields
)
177 input_names
= create_args(info
.read_regs | info
.uninit_regs
)
181 for name
in input_names
:
182 regnum
= yield getattr(self
.decoder
, name
)
184 self
.namespace
[regname
] = regnum
185 print('reading reg %d' % regnum
)
186 inputs
.append(self
.gpr(regnum
))
188 results
= info
.func(self
, *inputs
)
192 output_names
= create_args(info
.write_regs
)
193 for name
, output
in zip(output_names
, results
):
194 regnum
= yield getattr(self
.decoder
, name
)
195 print('writing reg %d' % regnum
)
197 output
= SelectableInt(output
.value
, 64)
198 self
.gpr
[regnum
] = output
199 self
.pc
.update(self
.namespace
)
203 """ Decorator factory. """
204 def variable_injector(func
):
206 def decorator(*args
, **kwargs
):
208 func_globals
= func
.__globals
__ # Python 2.6+
209 except AttributeError:
210 func_globals
= func
.func_globals
# Earlier versions.
212 context
= args
[0].namespace
213 saved_values
= func_globals
.copy() # Shallow copy of dict.
214 func_globals
.update(context
)
216 result
= func(*args
, **kwargs
)
217 #exec (func.__code__, func_globals)
220 # func_globals = saved_values # Undo changes.
226 return variable_injector