1 # This stage is intended to adjust the input data before sending it to
2 # the acutal ALU. Things like handling inverting the input, carry_in
3 # generation for subtraction, and handling of immediates should happen
5 from soc
.fu
.common_input_stage
import CommonInputStage
6 from soc
.fu
.bitmanip
.pipe_data
import BitManipInputData
9 class BitManipInputStage(CommonInputStage
):
10 def __init__(self
, pspec
):
11 super().__init
__(pspec
, "input")
14 return BitManipInputData(self
.pspec
)
17 return BitManipInputData(self
.pspec
)
19 def elaborate(self
, platform
):
20 m
= super().elaborate(platform
) # handles A, carry and sticky overflow
24 comb
+= self
.o
.rc
.eq(self
.i
.rc
)