add endian
[soc.git] / src / soc / fu / compunits / test / test_ldst_compunit.py
1 import unittest
2 from soc.decoder.power_enums import (XER_bits, Function)
3
4 from soc.fu.ldst.test.test_pipe_caller import LDSTTestCase, get_cu_inputs
5
6 from soc.fu.compunits.compunits import LDSTFunctionUnit
7 from soc.fu.compunits.test.test_compunit import TestRunner
8 from soc.fu.test.common import ALUHelpers
9 from soc.config.endian import bigendian
10
11
12 class LDSTTestRunner(TestRunner):
13 def __init__(self, test_data):
14 super().__init__(test_data, LDSTFunctionUnit, self,
15 Function.LDST, bigendian)
16
17 def get_cu_inputs(self, dec2, sim):
18 """naming (res) must conform to LDSTFunctionUnit input regspec
19 """
20 res = yield from get_cu_inputs(dec2, sim)
21 return res
22
23 def check_cu_outputs(self, res, dec2, sim, alu, code):
24 """naming (res) must conform to LDSTFunctionUnit output regspec
25 """
26
27 print ("check cu outputs", code, res)
28
29 rc = yield dec2.e.do.rc.data
30 op = yield dec2.e.do.insn_type
31 cridx_ok = yield dec2.e.write_cr.ok
32 cridx = yield dec2.e.write_cr.data
33
34 print ("check extra output", repr(code), cridx_ok, cridx)
35
36 if rc:
37 self.assertEqual(cridx_ok, 1, code)
38 self.assertEqual(cridx, 0, code)
39
40 sim_o = {}
41
42 yield from ALUHelpers.get_sim_int_o(sim_o, sim, dec2)
43 yield from ALUHelpers.get_sim_int_o1(sim_o, sim, dec2)
44 yield from ALUHelpers.get_wr_sim_cr_a(sim_o, sim, dec2)
45
46 ALUHelpers.check_cr_a(self, res, sim_o, "CR%d %s" % (cridx, code))
47 ALUHelpers.check_int_o(self, res, sim_o, code)
48 ALUHelpers.check_int_o1(self, res, sim_o, code)
49
50 # XER.so
51 return
52 oe = yield dec2.e.oe
53 if oe:
54 expected_so = 1 if sim.spr['XER'][XER_bits['so']] else 0
55 xer_so = res['xer_so']
56 self.assertEqual(expected_so, xer_so, code)
57
58
59 if __name__ == "__main__":
60 unittest.main(exit=False)
61 suite = unittest.TestSuite()
62 suite.addTest(LDSTTestRunner(LDSTTestCase.test_data))
63
64 runner = unittest.TextTestRunner()
65 runner.run(suite)