1 from nmutil
.singlepipe
import ControlBase
2 from nmutil
.pipemodbase
import PipeModBaseChain
3 from soc
.fu
.alu
.input_stage
import ALUInputStage
4 from soc
.fu
.logical
.main_stage
import LogicalMainStage
5 from soc
.fu
.alu
.output_stage
import ALUOutputStage
7 class LogicalStages(PipeModBaseChain
):
9 inp
= ALUInputStage(self
.pspec
)
10 main
= LogicalMainStage(self
.pspec
)
11 out
= ALUOutputStage(self
.pspec
)
12 return [inp
, main
, out
]
15 class LogicalBasePipe(ControlBase
):
16 def __init__(self
, pspec
):
17 ControlBase
.__init
__(self
)
18 self
.pipe1
= LogicalStages(pspec
)
19 self
._eqs
= self
.connect([self
.pipe1
])
21 def elaborate(self
, platform
):
22 m
= ControlBase
.elaborate(self
, platform
)
23 m
.submodules
.pipe
= self
.pipe1