Missed a few...
[libreriscv.git] / veera.mdwn
1 # R Veera Kumar
2
3 Helping Core Hardware developers.
4
5 # Status tracking
6
7 ## Currently working on
8
9 - <https://bugs.libre-soc.org/show_bug.cgi?id=602> Low performance bare minimum functionality SIMD emulator required
10
11 - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases to include expected results
12
13 ## Completed but not yet submitted:
14
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[lkcl]]
16
17 ## Submitted for NLNet RFP
18
19 submitted but not confirmed paid:
20
21 ## Paid
22
23 donation from NLNet confirmed received:
24
25 ### Project 2019-10-043 wishbone
26
27 - <https://bugs.libre-soc.org/show_bug.cgi?id=595> Convert bitmap images to svg
28 - (total EUR 200)
29
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=612> Installation instructions for nextpnr with ecp5 support
31 - (EUR 150)
32
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=626> dev-env-setup script for verilator, ghdl, iverilog and cocotb
34 - (EUR 250)
35
36 - <https://bugs.libre-soc.org/show_bug.cgi?id=634> sphinx - build, install and interface with projects
37 - (EUR 150)
38
39 - <https://bugs.libre-soc.org/show_bug.cgi?id=651> Convert bitmap images to vector svg - multi i/o dep cell and multi func unit
40 - (EUR 300)
41
42 ## Completed
43
44 - <http://bugs.libre-riscv.org/show_bug.cgi?id=181> test and install public-inbox
45