-* The GPU is integrated (like Mali400). So all that the GPU needs to do
- is write to an area of memory (framebuffer or area of the framebuffer).
- the SoC - which in this case has a RISC-V core and has peripherals such
- as the LCD controller - will take care of the rest.
-* In this arcitecture, the GPU, the CPU and the peripherals are all on
- the same AXI4 shared memory bus. They all have access to the same shared
- DDR3/DDR4 RAM. So as a result the GPU will use AXI4 to write directly
- to the framebuffer and the rest will be handle by SoC.
-* The job must be done by a team that shows sufficient expertise to
- reduce the risk. (Do you mean a team with good CVs? What about if the
- team shows you an acceptable FPGA prototype? I’m talking about a team
- of students which do not have big industrial CVs but they know how to
- handle this job (just like RocketChip or MIAOW or etc…).
+* The GPU is integrated (like Mali400). So all that the GPU needs to do is write to an area of memory (framebuffer or area of the framebuffer). The SoC - which in this case has a RISC-V core and has peripherals such as the LCD controller - will take care of the rest.
+* In this arcitecture, the GPU, the CPU and the peripherals are all on the same AXI4 shared memory bus. They all have access to the same shared DDR3/DDR4 RAM. So as a result the GPU will use AXI4 to write directly to the framebuffer and the rest will be handle by SoC.
+* The job must be done by a team that shows sufficient expertise to reduce the risk.
+
+## Notes