- def __init__(self, rwid, opwid, mem):
+ def __init__(self, rwid, opwid, n_ldsts, mem):
aluopwid = 4 # see compldst.py for "internal" opcode
units.append(LDSTCompUnit(rwid, aluopwid, alu, mem))
aluopwid = 4 # see compldst.py for "internal" opcode
units.append(LDSTCompUnit(rwid, aluopwid, alu, mem))
self.fpregs = RegFileArray(rwid, n_regs)
# issue q needs to get at these
self.fpregs = RegFileArray(rwid, n_regs)
# issue q needs to get at these
# and these
self.alu_oper_i = Signal(4, reset_less=True)
self.alu_imm_i = Signal(rwid, reset_less=True)
# and these
self.alu_oper_i = Signal(4, reset_less=True)
self.alu_imm_i = Signal(rwid, reset_less=True)
- cul = CompUnitLDSTs(self.rwid, 4, None)
+ cul = CompUnitLDSTs(self.rwid, 4, self.lsissue.n_insns, None)
- m.submodules.cu = cu = CompUnitsBase(self.rwid, [cua, cub, cul])
+ m.submodules.cu = cu = CompUnitsBase(self.rwid, [cua, cul, cub])
m.submodules.issueunit = issueunit
# Shadow Matrix. currently n_intfus shadows, to be used for
m.submodules.issueunit = issueunit
# Shadow Matrix. currently n_intfus shadows, to be used for
# branch is active (TODO: a better signal: this is over-using the
# go_write signal - actually the branch should not be "writing")
# branch is active (TODO: a better signal: this is over-using the
# go_write signal - actually the branch should not be "writing")
instrs = create_random_ops(dut, 15, True, 4)
if True: # LD test (with immediate)
instrs = create_random_ops(dut, 15, True, 4)
if True: # LD test (with immediate)
- instrs.append( (1, 2, 2, 0x20, 1, 20, (0, 0)) )
+ instrs.append( (1, 2, 2, 0x10, 1, 20, (0, 0)) )
if False:
instrs.append( (1, 2, 2, 1, 1, 20, (0, 0)) )
if False:
instrs.append( (1, 2, 2, 1, 1, 20, (0, 0)) )