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missing module argument to TestRunner execute
[soc.git]
/
src
/
soc
/
fu
/
compunits
/
test
/
test_compunit.py
diff --git
a/src/soc/fu/compunits/test/test_compunit.py
b/src/soc/fu/compunits/test/test_compunit.py
index 58c381b8623e5592ad2feff0db4d6f211bd63006..e115c2158e3faec39d9aabf5375a196bcb34dd5e 100644
(file)
--- a/
src/soc/fu/compunits/test/test_compunit.py
+++ b/
src/soc/fu/compunits/test/test_compunit.py
@@
-187,7
+187,7
@@
class TestRunner(FHDLTestCase):
self.funit = funit
self.bigendian = bigendian
self.funit = funit
self.bigendian = bigendian
- def execute(self, cu, l0, instruction, pdecode2, simdec2, test):
+ def execute(self,
m,
cu, l0, instruction, pdecode2, simdec2, test):
program = test.program
print("test", test.name, test.mem)
program = test.program
print("test", test.name, test.mem)
@@
-239,7
+239,7
@@
class TestRunner(FHDLTestCase):
# set operand and get inputs
yield from set_operand(cu, pdecode2, sim)
# reset read-operand mask
# set operand and get inputs
yield from set_operand(cu, pdecode2, sim)
# reset read-operand mask
- rdmask = get_rdflags(pdecode2.e, cu)
+ rdmask = get_rdflags(
m,
pdecode2.e, cu)
#print ("hardcoded rdmask", cu.rdflags(pdecode2.e))
#print ("decoder rdmask", rdmask)
yield cu.rdmaskn.eq(~rdmask)
#print ("hardcoded rdmask", cu.rdflags(pdecode2.e))
#print ("decoder rdmask", rdmask)
yield cu.rdmaskn.eq(~rdmask)
@@
-359,7
+359,7
@@
class TestRunner(FHDLTestCase):
for test in self.test_data:
print(test.name)
with self.subTest(test.name):
for test in self.test_data:
print(test.name)
with self.subTest(test.name):
- yield from self.execute(cu, l0, instruction,
+ yield from self.execute(
m,
cu, l0, instruction,
pdecode2, simdec2,
test)
pdecode2, simdec2,
test)