re-reserve bit in setvl -- needed for extending registers:

[libreriscv.git] / .gitignore

diff --git a/.gitignore b/.gitignore
index 8a764a2331894368e1ce68fc2fca69ab1640accc..7390ffca2f52bda03aea67c692bf2f8c76767af6 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -3,3 +3,15 @@
 
 # macOS generated files
 .DS_Store
+
+# texstudio
+*.log
+*.aux
+*.nav
+*.out
+*.toc
+*.snm
+*.vrb
+*.synctex.gz
+
+__pycache__