This is a page describing a proposed mass-volume SoC. It outlines:
-* the NREs involved (realistically USD $7m, with headroom up to $12m preferred)
+* the Non-Recurring Engineering (NRE) costs involved (realistically USD $7m, with headroom up to $12m preferred)
* proposes a fair market price (around $12-13)
* estimates a manufacturing cost (around $3.50 to $4)
* realistic industry-standard timescales (12-18 months).
The *only reason*
that it went into the Raspberry Pi at all (selling in far smaller quantities) was because Eben Upton was an employee of Broadcom and had access to NDA'd internal datasheets. Crucially: on
learning that it was to be deployed in an Educational market, Broadcom
-could not exactly say "no".
+could not exactly say "no."
In eight years, 36 million "Pi" units have been sold. However this is not
all the same processor: there are four variants (Model A/B thru Pi 4). Thus
- dual 32-bit DDR3/4 interfaces.
- Suitable for 4k HD resolution screens and Graphics Card capability.
-By re-packaging the same die in different FPGA packages it meets the
+By re-packaging the same die in different FBGA packages it meets the
needs of different markets without significant NREs. Texas Instruments
and Freescale/NXP and many other companies follow this practice.
* USD 400,000 for engineer to perform layout to GDS-II
* USD 1,000,000 for (LP)DDR3/4 which includes customisation by IP vendor
* USD 250,000 for Libre-licensed DDR firmware (normally closed binary)
-* USD 250,000 for USB3/C
+* USD 250,000 for USB3.1/2/C
* USD 250,000 for HDMI PHY (includes HDCP closed firmware: DVI may be better)
* USD 50,000 for PCIe PHY
* USD 50,000 for RGMII Ethernet PHY
- Standard "Pi / Arduino" SoC-style interfaces including UART, I2C,
SPI, GPIO, PWM, EINT, AC97.
-The "PI / Arduino" style interfaces are provided so as to be pin-comoatibke with the existing "Shield" 3rd party producy markets.
+The "PI / Arduino" style interfaces are provided so as to be pin-compatible with the existing "Shield" 3rd party product markets.
# Interfaces
-Much of the advanced section is "under consideration" because there are proprietary firmware issues involved as well as high power consumption and high costs involved. OpenCAPI for example would, in 22nm, at 25 ghz, be an enormous power draw (IBM used 14nm for the POWER9 25ghz SERDES)
+Much of the advanced section is "under consideration" because there are proprietary firmware issues involved as well as high power consumption and high costs involved. OpenCAPI for example would, in 22nm, at 25 GHz, be an enormous power draw (IBM used 14nm for the POWER9 25GHz SERDES)
-HDCP is present in HDMI, as well as being optional in eDP and by extension USB-C as well. Licensing of any of these Controllers therefore introduces the risk of closed firmware which will be viewed unfavourably by the educational markets, libre/open supporters and advocates, as well as cause Customer Support issues and introduce security vulnerabilities that *cannot be fixed or evaluated*.
+HDCP is present in HDMI, as well as being optional in eDP and by extension USB-C as well. Licensing of any of these Controllers therefore introduces the risk of closed firmware which will be viewed unfavorably by the educational markets, libre/open supporters and advocates, as well as cause Customer Support issues and introduce security vulnerabilities that *cannot be fixed or evaluated*.
Great care therefore needs to be taken in selecting the advanced interfaces.
projects / libreriscv.git / blobdiff