add zynqberry link

[libreriscv.git] / 3d_gpu.mdwn

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index e3a00a0c484a78a3bb37c07c4a3cb668c4842984..142ae73dd24e4270091e4222e2f7dee0b7d1f986 100644 (file)
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -13,7 +13,7 @@ in a 16x16mm 320 to 360 pin 0.8mm FBGA package.
 
 See:
 
-* [[libre_3d_gpu]]
+* [[shakti/m_class/libre_3d_gpu]]
 * [[discussion]]
 * Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
 * Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
@@ -59,3 +59,7 @@ Progress:
 * <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-March/000705.html>
 * <https://chisel.eecs.berkeley.edu/api/latest/chisel3/util/DecoupledIO.html>
 * <http://www.clifford.at/papers/2016/yosys-synth-formal/slides.pdf>
+* <http://blog.lambdaconcept.com/doku.php?id=migen:tutorial>
+* <http://chiselapp.com/user/kc5tja/repository/kestrel-3/dir?ci=6c559135a301f321&name=cores/cpu>
+* <https://chips4makers.io/blog/>
+* <https://hackaday.io/project/7817-zynqberry>