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[libreriscv.git] / 3d_gpu.mdwn

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index d16a58c54f15cdb4fd81ae22c869754b28de02dc..965ffd22c5edb86ca1cdcf7cfc81b7b1064776ef 100644 (file)
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -27,11 +27,30 @@ the cost of product development when it comes to PCB design and layout:
 We can look at larger higher-power ASICs either later or, if funding
 is made available, immediately.
 
-See:
+Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, single core dual issue, around 300 to 350mhz.  This will provide the confidence to go to higher geometries, as well as be a commercially viable embedded product in its own right.
+
+# Business Objectives
+
+* the project shall be a hybrid CPU-GPU because if it is not, the
+  complexity involved in developing a split shared-memory CPU-GPU both
+  at a hardware and a software level will be so costly it will jeapordise
+  the project.
+* the project shall be commercial and mass-volume (100 million units
+  and above)
+* the project shall be entirely transparent so that end-users will be
+  able to trust it
+* the source code shall be available at all times for all components
+  for BUSINESS reasons, making development and use of SDKs dead simple
+  and aiding and assisting developers AND BUSINESSES in debugging and thus
+  hugely saving them money.
+
+# Links:
 
 * [[shakti/m_class/libre_3d_gpu]]
 * [[discussion]]
 * [[resources]]
+* [[overview]]
+* [[3d_gpu/funding]]
 * Founding [[charter]]
 * Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
 * Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
@@ -43,8 +62,13 @@ See:
 * NLNet Project Page <https://nlnet.nl/project/Libre-RISCV/>
 * [[nlnet_proposals]]
 
-Progress:
+# Progress:
 
+* Dec 2019: Second round NLNet questions answered.  External Review completed.  6 NLNet proposals accepted (EUR 200,000+)
+* Nov 2019: Alternative FP library to Berkeley softfloat developed. NLNet first round questions answered.
+* Oct 2019: 3D Standards continued.  POWER ISA considered.  Open 3D Alliance begins.  NLNet funding applications submitted.
+* Sep 2019: 3D Standards continued.  Additional NLNet Funding proposals discussed.
+* Aug 2019: Development of "Transcendentals" (SIN/COS/ATAN2) Specifications
 * Jul 2019: Sponsorship from Purism received.  IEEE754 FP Mul, Add, DIV,
   FCLASS and FCVT pipelines completed.
 * Jun 2019: IEEE754 FP Mul, Add, and FSM "DIV" completed.
@@ -63,6 +87,7 @@ Progress:
 
 # News Articles
 
+* <https://www.phoronix.com/forums/forum/hardware/processors-memory/1133806-libre-risc-v-open-source-effort-now-looking-at-power-instead-of-risc-v/page7>
 * <https://hub.packtpub.com/a-libre-gpu-effort-based-on-risc-v-rust-llvm-and-vulkan-by-the-developer-of-an-earth-friendly-computer/>
 * <https://riscv.org/2018/10/packt-hub-article-a-libre-gpu-effort-based-on-risc-v-rust-llvm-and-vulkan-by-the-developer-of-an-earth-friendly-computer/>
 * <https://www.reddit.com/r/RISCV/comments/9jts9t/theres_a_new_libre_gpu_effort_building_on_riscv/>
@@ -85,6 +110,7 @@ Progress:
 * <https://www.reddit.com/r/RISCV/comments/db04j3/libreriscv_3d_cpugpu_seeks_grants_for_ambitious/>
 * <https://hardware.slashdot.org/story/19/09/29/1845252/libre-risc-v-3d-cpugpu-seeks-grants-for-ambitious-expansion>
 * <https://forums.puri.sm/t/risc-v-m-class-effort-and-purism-donation/6528/15>
+* <https://www.pro-linux.de/news/1/27527/comm/1/show-all-comments.html>
 
 # Information Resources and Tutorials
 
@@ -123,3 +149,7 @@ Progress:
 * <http://www.vlsiacademy.org/open-source-cad-tools.html>
 * <http://ngspice.sourceforge.net/adms.html>
 * <https://en.wikipedia.org/wiki/Verilog-AMS#Open_Source_Implementations>
+
+# Evaluations
+
+*[[openpower]]