(System-on-a-Chip) that happens to include a libre-licensed VPU and GPU.
We seek investors, sponsors, engineers and potential customers, who are
-interested in the creation and use of an entirely libre low-power mobile
-class system-on-a-chip. Comparative benchmark performance, pincount and
-price is the Allwinner A64, except that the power budget target is 2.5 watts
-in a 16x16mm 320 to 360 pin 0.8mm FBGA package.
+interested, as a first product, in the creation and use of an entirely
+libre low-power mobile class system-on-a-chip. Comparative benchmark
+performance, pincount and price is the Allwinner A64, except that the
+power budget target is 2.5 watts in a 16x16mm 320 to 360 pin 0.8mm
+FBGA package. Instead of single-issue higher clock rate, the design is
+multi-issue, aiming for around 800mhz.
The lower pincount, lower power, and higher BGA pitch is all to reduce
the cost of product development when it comes to PCB design and layout:
-* Above 4 watts requires metal packages, thermal management and much
- pricier PMICs.
-* 0.6mm pitch BGA and below requires much more expensive PCBA techniques.
+* Above 4 watts requires metal packages, greater attention to thermal
+ management in the PCB design and layout, and much pricier PMICs.
+* 0.6mm pitch BGA and below requires much more expensive PCB manufacturing
+ equipment and more costly PCBA techniques.
* Above 600 pins begins to reduce production yields as well as increase
the cost of testing and packaging.
We can look at larger higher-power ASICs either later or, if funding
is made available, immediately.
+Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, single core dual issue, around 300 to 350mhz. This will provide the confidence to go to higher geometries, as well as be a commercially viable embedded product in its own right.
+
See:
* [[shakti/m_class/libre_3d_gpu]]
* [[discussion]]
+* [[resources]]
* Founding [[charter]]
* Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
* Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
* Kazan Vulkan Driver (including 3D engine) <https://salsa.debian.org/Kazan-team/kazan>
* [NLNet 2019 Milestones](http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02)
* NLNet Project Page <https://nlnet.nl/project/Libre-RISCV/>
+* [[nlnet_proposals]]
Progress:
# News Articles
+* <https://www.phoronix.com/forums/forum/hardware/processors-memory/1133806-libre-risc-v-open-source-effort-now-looking-at-power-instead-of-risc-v/page7>
* <https://hub.packtpub.com/a-libre-gpu-effort-based-on-risc-v-rust-llvm-and-vulkan-by-the-developer-of-an-earth-friendly-computer/>
* <https://riscv.org/2018/10/packt-hub-article-a-libre-gpu-effort-based-on-risc-v-rust-llvm-and-vulkan-by-the-developer-of-an-earth-friendly-computer/>
* <https://www.reddit.com/r/RISCV/comments/9jts9t/theres_a_new_libre_gpu_effort_building_on_riscv/>
* <https://slashdot.org/submission/9750302/nlnet-funds-development-of-a-libre-risc-v-3d-cpu>
* <https://hardware.slashdot.org/story/19/06/02/0153243/nlnet-funds-development-of-a-libre-risc-v-3d-cpu>
* <https://www.phoronix.com/forums/forum/hardware/graphics-cards/1104124-libre-risc-v-snags-50k-eur-grant-to-work-on-its-risc-v-3d-gpu-chip/page6>
+* <https://news.ycombinator.com/item?id=21112341>
+* <https://www.reddit.com/r/RISCV/comments/db04j3/libreriscv_3d_cpugpu_seeks_grants_for_ambitious/>
+* <https://hardware.slashdot.org/story/19/09/29/1845252/libre-risc-v-3d-cpugpu-seeks-grants-for-ambitious-expansion>
+* <https://forums.puri.sm/t/risc-v-m-class-effort-and-purism-donation/6528/15>
# Information Resources and Tutorials
* <http://www.vlsiacademy.org/open-source-cad-tools.html>
* <http://ngspice.sourceforge.net/adms.html>
* <https://en.wikipedia.org/wiki/Verilog-AMS#Open_Source_Implementations>
+
+# Evaluations
+
+*[[openpower]]
projects / libreriscv.git / blobdiff