-# RISC-V 3D GPU / CPU / VPU
+# Hybrid 3D GPU / CPU / VPU
Creating a trustworthy processor for the world.
+Our [[3d_gpu/business_objectives]]
+
Note: this is a **hybrid** CPU, VPU and GPU. It is not, as many news articles
are implying, a "dedicated exclusive GPU". The option exists to *create*
a stand-alone GPU product (contact us if this is a product that you want).
Recent applications to NLNet (Oct 2019) are for a test chip in 180nm,
64 bit, single core dual issue, around 300 to 350mhz. This will provide
the confidence to go to higher geometries, as well as be a commercially
-viable embedded product in its own right.
-
-# Business Objectives
-
-See [[3d_gpu/business_objectives]]
-
-# Links:
-
-* [[shakti/m_class/libre_3d_gpu]]
-* [[discussion]]
-* [[resources]]
-* [[overview]]
-* [[3d_gpu/funding]]
-* [[3d_gpu/architecture]]
-* Founding [[charter]]
-* Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
-* Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
-* Wiki <https://libre-riscv.org>
-* Git repositories <https://git.libre-riscv.org>
-* Bugtracker <http://bugs.libre-riscv.org>
-* Kazan Vulkan Driver (including 3D engine) <https://salsa.debian.org/Kazan-team/kazan>
-* [NLNet 2019 Milestones](http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02)
-* NLNet Project Page <https://nlnet.nl/project/Libre-RISCV/>
-* [[nlnet_proposals]]
-* [[llvm]]
+viable embedded product in its own right. Tapeout deadline is Oct 2020.
# Progress:
+* Feb 2020: OpenPower Foundation EULA released. Coriolis2 Layout experimentation begun. Dynamic Partitioned SIMD ALU created.
* Jan 2020: New team members, Yehowshua and Michael. Last-minute attendance of FOSDEM2020
* Dec 2019: Second round NLNet questions answered. External Review completed. 6 NLNet proposals accepted (EUR 200,000+)
* Nov 2019: Alternative FP library to Berkeley softfloat developed. NLNet first round questions answered.
* Dec 2019 ProLinux <https://www.pro-linux.de/news/1/27527/comm/1/show-all-comments.html>
* Dec 2019 Phoronix <https://www.phoronix.com/forums/forum/hardware/graphics-cards/1148553-libre-risc-v-accelerator-secures-300k-eur-in-grants-still-undecided-about-the-isa/>
* Feb 15 2020 Phoronix <https://www.phoronix.com/scan.php?page=news_item&px=OpenPOWER-ISA-EULA-Draft/>
-
-# Information Resources and Tutorials
-
-* <https://github.com/timvideos/litex-buildenv/wiki/LiteX-for-Hardware-Engineers>
-* <https://jeffrey.co.in/blog/2014/01/d-flip-flop-using-migen/>
-* <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-March/000705.html>
-* <https://chisel.eecs.berkeley.edu/api/latest/chisel3/util/DecoupledIO.html>
-* <http://www.clifford.at/papers/2016/yosys-synth-formal/slides.pdf>
-* <http://blog.lambdaconcept.com/doku.php?id=migen:tutorial>
-* <http://chiselapp.com/user/kc5tja/repository/kestrel-3/dir?ci=6c559135a301f321&name=cores/cpu>
-* <https://chips4makers.io/blog/>
-* <https://hackaday.io/project/7817-zynqberry>
-* <https://wiki.f-si.org/index.php/FSiC2019>
-* <https://github.com/efabless/raven-picorv32> - <https://efabless.com>
-* <https://efabless.com/design_catalog/default>
-* <https://toyota-ai.ventures/>
-* <https://github.com/lambdaconcept/minerva>
-* <https://en.wikipedia.org/wiki/Liskov_substitution_principle>
-* <https://en.wikipedia.org/wiki/Principle_of_least_astonishment>
-* <https://peertube.f-si.org/videos/watch/379ef007-40b7-4a51-ba1a-0db4f48e8b16>
-* <https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.md>
-* <https://mshahrad.github.io/openpiton-asplos16.html>
-* <https://wiki.f-si.org/index.php/The_Raven_chip:_First-time_silicon_success_with_qflow_and_efabless>
-* <http://smallcultfollowing.com/babysteps/blog/2019/04/19/aic-adventures-in-consensus/>
-* <http://www.crnhq.org/12-Skills-Summary.aspx?rw=c>
-* <http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02>
-* <https://pdfs.semanticscholar.org/5060/4e9aff0e37089c4ab9a376c3f35761ffe28b.pdf>
-* <http://www.acsel-lab.com/arithmetic/arith15/papers/ARITH15_Takagi.pdf>
-* <https://youtu.be/o5Ihqg72T3c>
-* <http://flopoco.gforge.inria.fr/>
-* Fundamentals of Modern VLSI Devices <https://groups.google.com/a/groups.riscv.org/d/msg/hw-dev/b4pPvlzBzu0/7hDfxArEAgAJ>
-
-# Analog Simulation
-
-* <https://github.com/Isotel/mixedsim>
-* <http://www.vlsiacademy.org/open-source-cad-tools.html>
-* <http://ngspice.sourceforge.net/adms.html>
-* <https://en.wikipedia.org/wiki/Verilog-AMS#Open_Source_Implementations>
+* Feb 15 2020 Slashdot OpenPOWER article <https://news.slashdot.org/story/20/02/16/1743222/openpower-foundation-releases-eula-for-power-isa>
# Evaluations
projects / libreriscv.git / blobdiff