See architectural details [here](./architecture)
+# "Gaddie Pitch" (1) for LibreSOC
+
+| What we do | Benefits | Feelings |
+| ------------------------ | --------------------- | ----------------------- |
+| design high-performance | No spying backdoors, | Much less frustrated |
+| efficient and simpler | greatly reduced time | when developing products|
+| processors with built-in | and cost to market | using e.g. China-based |
+| 3D and Video capability | Simpler debugging | products. End-customer |
+| in a fully-transparent | Full transparency | stops complaining, |
+| fashion. | for their customers | Risk and worry gone. |
+
+## You know how...
+
+You know how for computers, you really have no idea how they work? And
+how you keep having to replace them with upgrades? Turns out that
+it's very difficult for medium-sized businesses to design lower-cost products
+because the only cheap processors (almost always from China) do not respect
+Copyright law, provide almost zero documentation, and even Intel processors
+are known to have spying backdoor co-processors in them?
+
+## Well what we do is...
+
+Well, what we do is: design 3D-capable efficient processors based on
+full transparency. All source code, right to the bedrock, hardware
+and software. We don't tell customers "trust us", we say "go have a
+specialist audit the full source, independently". If there's ever
+some documentation missing, the customer can check for themselves when
+designing *their* product around ours.
+
+## In fact...
+
+In fact, one customer that we're talking to is so fed up with a Chinese-based
+$35 component that they are using in a $3000 product, where they are having
+to spend considerable resources to *reverse-engineer* the China component,
+they're willing to bet on our product even before we've
+completed it, they believe in the approach and that our design can help
+them out that much.
+
+# "Gaddie Pitch" (1.5) for LibreSOC + EOMA68
+
+## What we do
+
+Design modular computing appliances based around "Computer Card" standards
+where the "Computer Card" may be upgraded, swapped, shared, re-programmed,
+re-purposed, and re-used.
+
+## Benefits
+
+Almost too numerous to describe. Not just the right to repair: the right
+to redesign and many more. "Computer Card" has the data *and* the apps on
+it, so goodbye file incompatibility: just move **the whole computer** from a
+TV slot to a Laptop slot to a Tablet slot to a Desktop slot. Also the cost
+savings and environmental savings are enormous. Keep the same $300 Laptop
+"Housing" for 15 years, upgrade its parts over time, and not only buy a
+new Computer Card for $30 every 2 years, keep the old one as a "spare",
+give it to the kids, re-program it for watching Videos, the list is endless.
+
+## Feelings
+
+Every person we've spoken to, once they get around the confusion of the
+idea of a "Computer" being inside a "Card" rather than "part of A Laptop",
+has loved both the environmental as well as the cost savings.
+
+# "Gaddie Pitch" (2) for LibreSOC
+
+Cole TODO
+
# Hybrid 3D GPU / CPU / VPU
Creating a trustworthy processor for the world.
We seek investors, sponsors (whose contributions thanks to NLNet may be
tax-deductible), engineers and potential customers, who are
interested, as a first product, in the creation and use of an entirely
-libre low-power mobile class system-on-a-chip. Comparative benchmark
+libre low-power mobile class system-on-a-chip
+[[shakti/m_class/]]. Comparative benchmark
performance, pincount and price is the Allwinner A64, except that the
power budget target is 2.5 watts in a 16x16mm 320 to 360 pin 0.8mm
FBGA package. Instead of single-issue higher clock rate, the design is
# Progress:
+* Oct 2020 [[180nm_Oct2020/ls180/]] pinouts decided, code-freeze initiated
+ for 180nm test ASIC, GDSII deadline set of Dec 2nd.
+* Sep 2020: [first boot](https://youtu.be/72QmWro9BSE) of Litex BIOS on a Versa ECP5 at 55mhz. DDR3 RAM initialisation successful. 180nm ASIC pinouts started [[180nm_Oct2020/ls180]]
* Aug 2020: [first boot](https://libre-soc.org/3d_gpu/libresoc_litex_bios_first_execution_2020-08-06_16-15.png) of litex BIOS in verilator simulation
* Jul 2020: first ppc64le "hello world" binary executed. 80,000 gate coriolis2 auto-layout completed with 99.98% routing. Wishbone MoU signed making available access to an additional EUR 50,000 donations from NLNet. XDC2020 and OpenPOWER conference submissions entered.
* Jun 2020: core unit tests and pipeline formal correctness proofs in place.
# Drivers
* [[3d_gpu/opencl]]
+* [[3d_gpu/mesa]]
projects / libreriscv.git / blobdiff