fosdem2024_bigint: add files for building the pdf

[libreriscv.git] / 45nm_Fall2022.mdwn

diff --git a/45nm_Fall2022.mdwn b/45nm_Fall2022.mdwn
index ac6ef85fec2241840f530f5e5ebf93b5dba61d47..a73ed396e80e9c17dec382a624d1c7ff19287777 100644 (file)
--- a/45nm_Fall2022.mdwn
+++ b/45nm_Fall2022.mdwn
@@ -12,12 +12,13 @@ board computers.
 
 ## Devices
  - 4 Core POWER CPU
- - SimpleV GPU
+ - SimpleV Capability and GPU Instructions
  - IOMMU
  - Coherent Accelerator Processor Proxy (CAPP) functional unit
- - PCIE host Controller
- - PCIE Slave controller(RaptorCS also wants to use LibreSOC as a GPU on their POWER mobos)
+ - PCIe host Controller
+ - PCIe Slave controller(RaptorCS wants to use LibreSOC as a GPU on their POWER mobos)
  - BMC - enables LibreSOC to become a discrete GPU with video output and ethernet.
+ - RGB/TTL framebuffer VGA/LCD PHY from Richard Herveille, RoaLogic.
 
 ## Interfaces
 
@@ -26,8 +27,8 @@ board computers.
  - SERDES - 10rx, 14tx
    - 4tx, 4rx for [OMI(DDR4](https://openpowerfoundation.org/wp-content/uploads/2018/10/Jeff-Steuchli.OpenCAPI-OPS-OMI.pdf) on top of SERDES with OpenCAPI protocol) @5GHz
    - 2tx, 2rx for ethernet
-   - 4tx, 4rx for PCIE and other CAPI devices
-   - 3tx for HDMI
+   - 4tx, 4rx for PCIe and other CAPI devices
+   - 3tx for HDMI (note: requires HDMI Trademark Licensing and Compliance Testing)
  - [OpenFSI](https://openpowerfoundation.org/?resource_lib=field-replaceable-unit-fru-service-interface-fsi-openfsi-specification) instead of JTAG
    - [Raptor HDL](https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga)
    - [Raptor Libsigrok](https://gitlab.raptorengineering.com/raptor-engineering-public/dsview/-/tree/master/libsigrokdecode4DSL/decoders/fsi)
@@ -45,6 +46,7 @@ These should be easily doable with LiteX.
 * [[shakti/m_class/QSPI]]
 * [[shakti/m_class/LPC]]
 * [[shakti/m_class/EINT]]
+* [[shakti/m_class/RGBTTL]] in conjunction with TI TFP410a or Chrontel converter
 
 ## Protocols
  - IPMT over i2c to talk to the BMC