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split out non-derived params into separate class without all the accuracy checking...
[soc.git]
/
Makefile
diff --git
a/Makefile
b/Makefile
index 736cd7b1ac2ace8e379e6a941d3e1f0adaf4c0de..8d379590387090fa04a28b2b64ebac56c26231ec 100644
(file)
--- a/
Makefile
+++ b/
Makefile
@@
-72,7
+72,7
@@
microwatt_external_core_spi:
microwatt_external_core_bram:
python3 src/soc/simple/issuer_verilog.py --microwatt-compat \
--enable-mmu \
- --pc-reset 0xFF
F
00000 \
+ --pc-reset 0xFF
0
00000 \
external_core_top.v
# build the litex libresoc SoC without 4k SRAMs