Bug 1244: changes to pospopcnt

[libreriscv.git] / conferences / fosdem2024 / fosdem2024_ddffirst / fosdem2024_ddffirst.tex

diff --git a/conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex b/conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex
index 56b43a1b593a257b02e1dbe2f4225717609be484..04805956b4ec69c52215cd79a878d57512640706 100644 (file)
--- a/conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex
+++ b/conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex
@@ -98,17 +98,6 @@
 
 
 
-\frame{\frametitle{Simple SBC-style SoC}
-
-\begin{center}
-\includegraphics[width=0.6\textwidth]{pospopcount.png}
-\end{center}
-
-}
-
-
-
-
 \begin{frame}[fragile]
 \frametitle{Simple-V CMPI in a nutshell}
 
@@ -141,8 +130,8 @@ function op\_cmpi(BA, RA, SI) # cmpi not vector-cmpi!
         \item ARM SVE: https://arxiv.org/pdf/1803.06185.pdf
         \item more: wikipedia Vector processor page: Fault/Fail First
         \vspace{10pt}
-               \item Load/Store is Memory to/from Register, \\
-              what about Register to Register?
+               \item Load/Store is Memory to/from Register, what about
+              Register to Register?
         \item Register-to-register: "Data-Dependent Fail-First."
         \item Z80 LDIR: Mem-Register, CPIR: Register-Register
        \end{itemize}
@@ -172,7 +161,16 @@ for (i = 0; i < VL; i++)
        \end{itemize}
 \end{frame}
 
-
+\frame{\frametitle{Power ISA v3.1 vstribr}
+       
+       \lstinputlisting[language={}]{vstribr.txt}
+       
+       \begin{itemize}
+               \item ironically this hard-coded instruction is
+               identical to general-purpose Simple-V DD-FFirst...
+       \end{itemize}
+       
+}Po
 
 \frame{\frametitle{maxloc}
   \begin{itemize}
@@ -185,11 +183,44 @@ for (i = 0; i < VL; i++)
   \begin{itemize}
        \item   Positional popcount adds up the totals of each bit set to 1 in each bit-position, of an array of input values.
        \item   Notoriously difficult to do in SIMD assembler: typically 550 lines
+    \item https://github.com/clausecker/pospop
+
    \end{itemize}
        
        \lstinputlisting[language={}]{pospopcount.c}
+
        
 }
+
+\frame{\frametitle{Pospopcount}
+       
+       \begin{center}
+               \includegraphics[width=0.5\textwidth]{pospopcount.png}
+       \end{center}
+         \begin{itemize}
+               \item   The challenge is to perform an appropriate transpose of the data (the CPU can only work on registers, horizontally),
+               in blocks that suit the processor and the ISA capacity.
+
+               
+       \end{itemize}
+}
+
+\frame{\frametitle{Pospopcount}
+       
+       \begin{center}
+               \includegraphics[width=0.6\textwidth]{array_popcnt.png}
+       \end{center}
+
+  \begin{itemize}
+
+               \item   The draft gbbd instruction implements the transpose (shown above), 
+                               preparing the data to use the standard popcount instruction.
+                          (gbbd is based on Power ISA vgbbd)
+       
+       \end{itemize}
+       
+}
+
 \frame{\frametitle{Pospopcount.s}
 
 
@@ -200,11 +231,14 @@ for (i = 0; i < VL; i++)
 
 \frame{\frametitle{strncpy}
 
+       \lstinputlisting[language={}]{strncpy.c}
   \begin{itemize}
        \item "TODO
  \end{itemize} 
 }
 
+
+
 \frame{\frametitle{strncpy assembler}
 
 \lstinputlisting[language={}]{strncpy.s}