Bug 1244: changes to description pospopcount

[libreriscv.git] / conferences / fosdem2024 / fosdem2024_ddffirst / fosdem2024_ddffirst.tex

diff --git a/conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex b/conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex
index 56e9264cb7c3827dca7bef99987d7cccf8bdbe28..58550e9924ebba6c72e407f02f245cbe5dddb5ca 100644 (file)
--- a/conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex
+++ b/conferences/fosdem2024/fosdem2024_ddffirst/fosdem2024_ddffirst.tex
@@ -98,17 +98,6 @@
 
 
 
-\frame{\frametitle{Simple SBC-style SoC}
-
-\begin{center}
-\includegraphics[width=0.6\textwidth]{pospopcount.png}
-\end{center}
-
-}
-
-
-
-
 \begin{frame}[fragile]
 \frametitle{Simple-V CMPI in a nutshell}
 
@@ -172,23 +161,16 @@ for (i = 0; i < VL; i++)
        \end{itemize}
 \end{frame}
 
-
-
-\frame{\frametitle{Additional Simple-V features}
-
- \begin{itemize}
-   \item "fail-on-first" (POWER9 VSX strncpy segfaults on boundary!)
-   \item "Twin Predication" (covers VSPLAT, VGATHER, VSCATTER, VINDEX etc.)
-   \item SVP64: extensive "tag" (Vector context) augmentation
-   \item "Context propagation": a VLIW-like context.  Allows contexts
-         to be repeatedly applied.
-          Effectively a "hardware compression algorithm" for ISAs.
-   \item Ultimate goal: cut down I-Cache usage, cuts down on power
-   \item Typical GPU has its own I-Cache and small shaders.\\
-        \textit{We are a Hybrid CPU/GPU: I-Cache is not separate!}
-   \item Needs to go through OpenPOWER Foundation `approval'         
-  \end{itemize}
-}
+\frame{\frametitle{Power ISA v3.1 vstribr}
+       
+       \lstinputlisting[language={}]{vstribr.txt}
+       
+       \begin{itemize}
+               \item ironically this hard-coded instruction is
+               identical to general-purpose Simple-V DD-FFirst...
+       \end{itemize}
+       
+}Po
 
 \frame{\frametitle{maxloc}
   \begin{itemize}
@@ -201,11 +183,42 @@ for (i = 0; i < VL; i++)
   \begin{itemize}
        \item   Positional popcount adds up the totals of each bit set to 1 in each bit-position, of an array of input values.
        \item   Notoriously difficult to do in SIMD assembler: typically 550 lines
+
    \end{itemize}
        
        \lstinputlisting[language={}]{pospopcount.c}
        
 }
+
+\frame{\frametitle{Pospopcount}
+       
+       \begin{center}
+               \includegraphics[width=0.6\textwidth]{pospopcount.png}
+       \end{center}
+         \begin{itemize}
+               \item   The challenge is to perform an appropriate transpose of the data (the CPU can only work on registers, horizontally),
+               in blocks that suit the processor and the ISA capacity.
+
+               
+       \end{itemize}
+}
+
+\frame{\frametitle{Pospopcount}
+       
+       \begin{center}
+               \includegraphics[width=0.6\textwidth]{array_popcnt.png}
+       \end{center}
+
+  \begin{itemize}
+
+               \item   The draft gbbd instruction implements the transpose (shown above), 
+                               preparing the data to use the standard popcount instruction.
+
+       
+       \end{itemize}
+       
+}
+
 \frame{\frametitle{Pospopcount.s}
 
 
@@ -216,11 +229,14 @@ for (i = 0; i < VL; i++)
 
 \frame{\frametitle{strncpy}
 
+       \lstinputlisting[language={}]{strncpy.c}
   \begin{itemize}
        \item "TODO
  \end{itemize} 
 }
 
+
+
 \frame{\frametitle{strncpy assembler}
 
 \lstinputlisting[language={}]{strncpy.s}