re-reserve bit in setvl -- needed for extending registers:

[libreriscv.git] / conferences.mdwn

diff --git a/conferences.mdwn b/conferences.mdwn
index dd203c208ede54e268c5c3636709aae0c1f8b6f0..4ba25c5601262c59b51bf04ffcc37448b93b29b9 100644 (file)
--- a/conferences.mdwn
+++ b/conferences.mdwn
@@ -186,6 +186,13 @@ https://my.fsf.org/lp-call-for-sessions deadline dec 1 2021
 
 * [[conferences/ics2022]]
 
+## Silicon Salon 2022
+
+Wed, June 1, 2022   5:00 PM – 8:00 PM BST
+
+* <https://www.blockchaincommons.com/salons/silicon-salon/>
+* [[conferences/siliconsalon2022]]
+
 ## XDC 2022
 
 04-06 Oct 2022
@@ -193,3 +200,8 @@ https://my.fsf.org/lp-call-for-sessions deadline dec 1 2021
 * <https://indico.freedesktop.org/event/2/abstracts/> deadline 4th July 2022
 * [[conferences/xdc2022]]
 
+# ADGC2022
+
+12 nov 2022
+
+8th ADG OpenPOWER Workshop