re-reserve bit in setvl -- needed for extending registers:

[libreriscv.git] / docs.mdwn

diff --git a/docs.mdwn b/docs.mdwn
index 165a025c60116d9b98becb3ed6b46da3004db02a..de8dceec05bb62d504699b2a96d45e298db5f024 100644 (file)
--- a/docs.mdwn
+++ b/docs.mdwn
@@ -49,3 +49,23 @@ yourself, in order to verify them, see [[HDL_workflow]]
 
 [[docs/learning_nmigen]]
 
+## Test API
+
+[[docs/testapi]]
+
+## Pinmux and JTAG Boundary Scan
+
+[[docs/pinmux]]
+
+## pypowersim python-based command-line simulator
+
+[[docs/pypowersim]]
+
+## First steps
+
+[[docs/firststeps]]
+
+## SVP64
+
+Currently in Draft form, [[openpower/sv/svp64]] is the basis of the
+Supercomputing Cray-style Vectorisation of the Power ISA.