re-reserve bit in setvl -- needed for extending registers:

[libreriscv.git] / docs.mdwn

diff --git a/docs.mdwn b/docs.mdwn
index 20d0b3e0ecf559b62fac3a00121df735f581be1f..de8dceec05bb62d504699b2a96d45e298db5f024 100644 (file)
--- a/docs.mdwn
+++ b/docs.mdwn
@@ -13,8 +13,8 @@ construction of FSMs and arbitrary length pipelines.
 | Git Repo | Online docs   | Description   | Pypi    |
 |----------|---------------|---------------|--------
 | [SOC](https://git.libre-soc.org/?p=soc.git;a=tree) | [Libre-SOC](https://docs.libre-soc.org/soc/) | Main OpenPOWER Hybrid CPU-GPU | TBD |
-| [FPU](https://git.libre-soc.org/?p=ieee754fpu.git;a=tree) | -- | Equivalent to hardfloat-3 | [libresoc-ieee754fpu](https://pypi.org/project/libresoc-ieee754fpu) |
-| [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | -- | Equivalent to Chisel3.util | [libresoc-nmutil](https://pypi.org/project/libresoc-nmutil) |
+| [FPU](https://git.libre-soc.org/?p=ieee754fpu.git;a=tree) | [ieee754fpu](https://docs.libre-soc.org/ieee754fpu/) | Equivalent to hardfloat-3 | [libresoc-ieee754fpu](https://pypi.org/project/libresoc-ieee754fpu) |
+| [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [nmutil](https://docs.libre-soc.org/nmutil/) | Equivalent to Chisel3.util | [libresoc-nmutil](https://pypi.org/project/libresoc-nmutil) |
 | [OpenPOWER ISA](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [OpenPOWER ISA](https://docs.libre-soc.org/openpower-isa/) | Simulator, ISA spec compiler, co-simulation infrastructure |  [libresoc-openpower-isa](https://pypi.org/project/libresoc-openpower-isa/)  |
 
 
@@ -33,26 +33,9 @@ The chroot is useful to ensure stability and repeatable builds: no
 errors or issues introduced by libraries being wrong versions.
 Also relevant is the [gdb gcc build](https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=ppc64-gdb-gcc;hb=HEAD).
 
-    pip3 install virtualenv requests
-    mkdir ~/.virtualenvs && cd ~/.virtualenvs
-    python3 -m venv libresoc
-    source ~/.virtualenvs/libresoc/bin/activate
-    
-    cd ~; mkdir libresoc; cd libresoc
-    git clone https://git.libre-soc.org/git/nmutil.git
-    git clone https://git.libre-soc.org/git/openpower-isa.git
-    git clone https://git.libre-soc.org/git/c4m-jtag.git
-    git clone https://git.libre-soc.org/git/ieee754fpu.git
-    git clone https://git.libre-soc.org/git/soc.git
-    
-    cd nmutil; make develop; cd ..
-    cd openpower-isa; make develop; cd ..
-    cd c4m-jtag; make develop; cd ..
-    cd ieee754fpu; make develop; cd ..
-    cd soc; make gitupdate; make develop; cd ..
-    
-    python3 soc/src/soc/decoder/power_decoder.py
-    yosys -p "read_ilang decoder.il; show dec31" 
+For a simple set of commands to follow, see [[HDL_workflow/devscripts]]. If
+you prefer to do a manual install and explicitly install dependencies
+yourself, in order to verify them, see [[HDL_workflow]]
 
 ## Gtkwave Tutorial
 
@@ -66,3 +49,23 @@ Also relevant is the [gdb gcc build](https://git.libre-soc.org/?p=dev-env-setup.
 
 [[docs/learning_nmigen]]
 
+## Test API
+
+[[docs/testapi]]
+
+## Pinmux and JTAG Boundary Scan
+
+[[docs/pinmux]]
+
+## pypowersim python-based command-line simulator
+
+[[docs/pypowersim]]
+
+## First steps
+
+[[docs/firststeps]]
+
+## SVP64
+
+Currently in Draft form, [[openpower/sv/svp64]] is the basis of the
+Supercomputing Cray-style Vectorisation of the Power ISA.