modified VL and MVL CSRs to range from 1-XLEN rather than 0-(XLEN-1)

[riscv-tests.git] / isa / rv64uc / sv_c_lwsp_predication.S

diff --git a/isa/rv64uc/sv_c_lwsp_predication.S b/isa/rv64uc/sv_c_lwsp_predication.S
index d2caf8be6768d04661cd764e900e4dfab0b7a1ce..0885dd7923cb9ac78a1df444637ab1b038fd87e8 100644 (file)
--- a/isa/rv64uc/sv_c_lwsp_predication.S
+++ b/isa/rv64uc/sv_c_lwsp_predication.S
@@ -28,11 +28,11 @@ RVTEST_CODE_BEGIN
   la sp, data;
 
         SET_SV_MVL(3)
-        SET_SV_2CSRS( SV_REG_CSR(1, 12, 0, 12, 1, 0),
-                      SV_REG_CSR(1, 2, 0, 2, 1, 0) )
+        SET_SV_2CSRS( SV_REG_CSR(1, 12, 0, 12, 1),
+                      SV_REG_CSR(1, 2, 0, 2, 1) )
         SET_SV_2PREDCSRS(
-                      SV_PRED_CSR(1, 2, 0, 0, 10, 1),
-                      SV_PRED_CSR(1, 12, 0, 0, 11, 1) );
+                      SV_PRED_CSR(1, 2, 0, 0, 10, 0),
+                      SV_PRED_CSR(1, 12, 0, 0, 11, 0) );
 
 
   SET_SV_VL(3)
@@ -45,9 +45,9 @@ RVTEST_CODE_BEGIN
   .option pop
 
 
-        SET_SV_VL(0)
+        SET_SV_VL(1)
         CLR_SV_CSRS()
-        SET_SV_MVL(0)
+        SET_SV_MVL(1)
 
   mv sp, a6