re-reserve bit in setvl -- needed for extending registers:

[libreriscv.git] / nlnet_2019_coriolis2.mdwn

diff --git a/nlnet_2019_coriolis2.mdwn b/nlnet_2019_coriolis2.mdwn
index 403db3535058a5b66a815dd0426d9b16d334b78f..d558a609cb67f77e307c876aa253f7adcb1ec304 100644 (file)
--- a/nlnet_2019_coriolis2.mdwn
+++ b/nlnet_2019_coriolis2.mdwn
@@ -1,6 +1,11 @@
-# NL.net proposal
-
-[[questions]]
+# NLnet.net LIP6.fr Coriolis2 proposal
+
+* [[questions]]
+* approved 20dec2019
+* MOU TBD
+* 2019-10-029
+* NLNet Project Page <https://nlnet.nl/project/Coriolis2/>
+* Top-level bugreport <http://bugs.libre-riscv.org/show_bug.cgi?id=138>
 
 ## Project name