re-reserve bit in setvl -- needed for extending registers:

[libreriscv.git] / nlnet_2019_coriolis2.mdwn

diff --git a/nlnet_2019_coriolis2.mdwn b/nlnet_2019_coriolis2.mdwn
index 8896e446d8773a9a4ea31cd35a91f90c6b823460..d558a609cb67f77e307c876aa253f7adcb1ec304 100644 (file)
--- a/nlnet_2019_coriolis2.mdwn
+++ b/nlnet_2019_coriolis2.mdwn
@@ -3,6 +3,9 @@
 * [[questions]]
 * approved 20dec2019
 * MOU TBD
+* 2019-10-029
+* NLNet Project Page <https://nlnet.nl/project/Coriolis2/>
+* Top-level bugreport <http://bugs.libre-riscv.org/show_bug.cgi?id=138>
 
 ## Project name