https://bugs.libre-soc.org/show_bug.cgi?id=985

[libreriscv.git] / nlnet_proposals.mdwn

diff --git a/nlnet_proposals.mdwn b/nlnet_proposals.mdwn
index 856873f63ab336d065768473ac25bdf96edc1f2c..6afda9d07fe4af18e891ad18511e83d2291afd32 100644 (file)
--- a/nlnet_proposals.mdwn
+++ b/nlnet_proposals.mdwn
@@ -8,7 +8,7 @@
 
 # being written
 
-(none underway at the moment)
+* [[nlnet_2024_ppc_svp64_autogen]]
 
 # submitted
 
@@ -26,10 +26,10 @@
 * [[nlnet_2019_wishbone_streaming]] - submitted 2019sep26 - submitter found (hank)  - accepted 20dec2019, MOU done
 * [[nlnet_2019_standards]] - submitted 2019sep27 - submitter found (phcomp)  - accepted 20dec2019, MOU done
 * [[nlnet_2021_lip6_vlsi]] LIP6 VLSI tools - submitted 29jul2021 - Ref 2021-08-049 - accepted 09nov2021 - MOU TODO - transferred to LIP6
+* [[nlnet_2021_crypto_router]] - 12jan2021 draft - submitter found (jan) submitted 24jan2021 - MOU done
 
 # accepted
 
-* [[nlnet_2021_crypto_router]] - 12jan2021 draft - submitter found (jan) submitted 24jan2021 - MOU done
 * [[nlnet_2021_3mdeb_cavatools]] 3mdeb Power ISA Simulator - submitted 31jul2021 - Ref 2021-08-071 - accepted 09nov2021 - MOU signed 2023mar06
 * [[nlnet_2022_opf_isa_wg]] - 2022-08-051 - submitted 2022jul27 - approved 24oct2022 - MOU signed 2023jun22
 * [[nlnet_2022_ongoing]] - 2022-08-107 - submitted 2022jul31 - approved 24oct2022