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[libreriscv.git] / openpower / sv / overview.mdwn

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 9f37c0198a2187f20dfd4eccf9afc034714c135b..4ac2f68f2c82acbd2acc975dd9ddfaba3facd81c 100644 (file)
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -90,6 +90,8 @@ The fundamentals are (just like x86 "REP"):
 * Once the loop is completed *only then* is the Program Counter
   allowed to move to the next instruction.
 
+[[!img "svp64-primer/img/power_pipelines.svg" ]]
+
 Hardware (and simulator) implementors are free and clear to implement this
 as literally a for-loop, sitting in between instruction decode and issue.
 Higher performance systems may deploy SIMD backends, multi-issue and