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[libreriscv.git] / openpower / sv / remap.mdwn

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 2b0db1be9fe73a457ac8ed12652188de596c5cfd..969f6409afbf316837ca5a3e67d8f7098e4ac06d 100644 (file)
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -452,6 +452,10 @@ which will turn the Schedule around such that issuing of the Scalar
 Defined Words is done with SUBVL looping as the inner loop not the
 outer loop. Rc=1 with Sub-Vectors (SUBVL=2,3,4) is `UNDEFINED` behaviour.
 
+*Programmer's Note: Overwrite Parallel Reduction with Sub-Vectors
+will clearly result in data corruption.  It may be best to perform
+a Pack/Unpack Transposing copy of the data first*
+
 ## Determining Register Hazards
 
 For high-performance (Multi-Issue, Out-of-Order) systems it is critical