note about programmers discouraged from writing to SPRs

[libreriscv.git] / openpower / sv / rfc / ls009.mdwn

diff --git a/openpower/sv/rfc/ls009.mdwn b/openpower/sv/rfc/ls009.mdwn
index 6ed3aa5aeea46e1aba0956dc1ce056515a4ca70a..1c5625f2b469141ca5d603f38c3db7648e2d6414 100644 (file)
--- a/openpower/sv/rfc/ls009.mdwn
+++ b/openpower/sv/rfc/ls009.mdwn
@@ -1073,6 +1073,7 @@ SVI-Form
 
 Pseudo-code:
 
+```
     # based on nearest MAXVL compute other dimension
     MVL <- SVSTATE[0:6]
     d <- [0] * 6
@@ -1129,6 +1130,7 @@ Pseudo-code:
         if idx = 3 then SVSHAPE3 <- shape
         SVSTATE[bit*2+32:bit*2+33] <- idx
         SVSTATE[46-bit] <- 1
+```
 
 Special Registers Altered:
 
@@ -1186,6 +1188,7 @@ and mo1 uses SVSHAPE1. REMAP.SVme=0b10001, REMAP.mi0=0, REMAP.mo1=1
 
 Rough algorithmic form:
 
+```
     marray = [mi0, mi1, mi2, mo0, mo1]
     idx = 0
     for bit = 0 to 4:
@@ -1193,6 +1196,7 @@ Rough algorithmic form:
         setup(SVSHAPE[idx])
         SVSTATE{marray[bit]} = idx
         idx = (idx+1) modulo 4
+```
 
 When `mm=1`:
 
@@ -1215,12 +1219,14 @@ set to 3 (SVSHAPE3).
 
 Rough algorithmic form:
 
+```
     marray = [mi0, mi1, mi2, mo0, mo1]
     bit = rmm[0:2]
     idx = rmm[3:4]
     setup(SVSHAPE[idx])
     SVSTATE{marray[bit]} = idx
     SVSTATE.pst = 1
+```
 
 In essence, `mm=0` is intended for use to set as much of the
 REMAP State SPRs as practical with a single instruction,
@@ -1300,11 +1306,8 @@ possible to correctly compute Register Hazards without requiring
 reading the contents of any SPRs.  If however there are
 instructions that have directly written to the SVSTATE or SVSHAPE
 SPRs and those instructions are still in-flight then this position
-is clearly **invalid**.*
-
-
-
-
+is clearly **invalid**. This is why Programmers are strongly
+discouraged from directly writing to these SPRs.*
 
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