add notes and observations for ls010 SVP64 main book proposal

[libreriscv.git] / openpower / sv / rfc / ls010.mdwn

diff --git a/openpower/sv/rfc/ls010.mdwn b/openpower/sv/rfc/ls010.mdwn
index 1e53be0cae55cf8233ac8c61ef8cc8a04cda62db..626d1d307ba6203f45c6830b0b48d4556dd27697 100644 (file)
--- a/openpower/sv/rfc/ls010.mdwn
+++ b/openpower/sv/rfc/ls010.mdwn
@@ -6,6 +6,7 @@
 * <https://libre-soc.org/openpower/sv/rfc/ls010/>
 * <https://bugs.libre-soc.org/show_bug.cgi?id=1045>
 * <https://git.openpower.foundation/isa/PowerISA/issues/64>
+* <https://git.openpower.foundation/isa/PowerISA/issues/121>
 
 **Severity**: Major
 
@@ -74,11 +75,16 @@ back to a simpler era in computing from half a century ago: the Zilog
 Z80 CPIR and LDIR instructions, and the 8086 REP instruction, and brings
 them forward to Modern-day Computing.  The result is a huge reduction in
 programming complexity, and a strong base to project the Power ISA back
-to the most powerful Supercomputing ISA for at least the next two decades.
+to the world's most powerful Supercomputing ISA for at least the next two
+decades.
 
 **Notes and Observations**:
 
-1. TODO
+Related RFCs are [[ls008]] for the two Management instructions `setvl`
+and `svstep`, and [ls009]] for the REMAP Subsystem. Also [[ls001]] is
+a Dependency as it introduces Primary Opcode 9 64-bit encoding. An
+additional RFC [[ls005]] introduced XLEN on which SVP64 is also critically
+dependent, for Element-width Overrides.
 
 **Changes**
 
@@ -98,5 +104,6 @@ Add the following entries to:
 [[!inline pages="openpower/sv/normal" raw=yes ]]
 [[!inline pages="openpower/sv/ldst" raw=yes ]]
 [[!inline pages="openpower/sv/branches" raw=yes ]]
-[[!inline pages="openpower/sv/po9_encoding" raw=yes ]]
 [[!inline pages="openpower/sv/cr_ops" raw=yes ]]
+[[!inline pages="openpower/sv/svp64/appendix" raw=yes ]]
+[[!inline pages="openpower/sv/compliancy_levels" raw=yes ]]