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[libreriscv.git] / openpower / sv / svp64_quirks.mdwn

diff --git a/openpower/sv/svp64_quirks.mdwn b/openpower/sv/svp64_quirks.mdwn
index bff45dcd8b209c7339b4bc408eb613ded4c2051e..b55e6b76789c75048d2cb0cfe129b5c98c9a8e31 100644 (file)
--- a/openpower/sv/svp64_quirks.mdwn
+++ b/openpower/sv/svp64_quirks.mdwn
@@ -684,7 +684,7 @@ This is to save on both Vector Length (VL of 16 is sufficient) as well as
 complexity in the Hazard Management when context-switching CR fields, as the
 entire batch of 128 CR Fields may be transferred to 8 GPRs with a VL of 16
 and elwidth overriding of 32. Truncation is sufficent, dropping the top 32 bits
-of the Condition Register(s) which are always zero anywy.
+of the Condition Register(s) which are always zero anyway.
 
 # Separate Scalar and Vector Condition Register files