* See [[peripheralschematics]] for example Reference Layouts
* See [[ramanalysis]] for a comprehensive analysis of why DDR3 is to be used.
* See [[todo]] for a rough list of tasks (and link to bugtracker)
+* <https://bugs.libre-soc.org/show_bug.cgi?id=2>
## Rough specification.
-Quad-core 28nm RISC-V 64-bit (RISCV64GC core with Vector SIMD Media / 3D
+Quad-core 28nm OpenPOWER 64-bit (OpenPOWER v3.0B core with Simple-V Vector Media / 3D
extensions), 300-pin 15x15mm BGA 0.8mm pitch, 32-bit DDR3-4/LPDDR3/4
memory interface and libre / open interfaces and accelerated hardware
functions suitable for the higher-end, low-power, embedded, industrial
<https://opencores.org/project,orsoc_graphics_accelerator>
+<https://github.com/m-labs/milkymist/tree/master/cores/tmu2>
+
### 3D acceleration
* MIAOW: ATI-compatible shader engine <http://miaowgpu.org/>
* ORSOC GPU contains some primitives that can be used
-* SIMD RISC-V extensions can obviate the need for a "full" separate GPU
+* Simple-V Vector extensions can obviate the need for a "full" separate GPU
* Nyuzi (OpenMP, based on Intel Larabee Compute Engine)
* Rasteriser <https://github.com/jbush001/ChiselGPU/tree/master/hardware>
* OpenShader <https://git.code.sf.net/p/openshader/code>