Sorta working FP renormalization in cordic
[ieee754fpu.git] / src / ieee754 / cordic / test / test_fp_pipe.py
index 295c3c4f3c42c3596a441750c6eefc467a652768..9edfd58b348addd2f67255802b4766c0291f582b 100644 (file)
@@ -44,6 +44,8 @@ class SinCosTestCase(FHDLTestCase):
                 yield z_valid.eq(1)
                 yield ready.eq(1)
                 yield
+            for i in range(40):
+                yield
 
         sim.add_sync_process(writer_process)
         with sim.write_vcd("fp_pipeline.vcd", "fp_pipeline.gtkw", traces=[
@@ -62,6 +64,11 @@ class SinCosTestCase(FHDLTestCase):
                 inputs.append(Float32(2.0**(-abs(i))))
         self.run_test(iter(inputs))
 
+    def test_pi_2(self):
+        inputs = [Float32(0.5), Float32(1/3), Float32(2/3),
+                  Float32(-.5), Float32(0.001)]
+        self.run_test(iter(inputs))
+
 
 if __name__ == "__main__":
     unittest.main()