remove debug prints

[ieee754fpu.git] / src / ieee754 / div_rem_sqrt_rsqrt / div_pipe.py

diff --git a/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py b/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py
index 899f4f5e1d4c590de92ba2024a183d12740a48cf..438fc619711b385fef66fe5aa14021ca5ed871c0 100644 (file)
--- a/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py
+++ b/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py
@@ -89,7 +89,7 @@ class DivPipeInterstageData(DivPipeCoreInterstageData, DivPipeBaseData):
 
     def eq(self, rhs):
         """ Assign member signals. """
-        print (self, rhs)
+        #print (self, rhs)
         return DivPipeCoreInterstageData.eq(self, rhs) + \
                DivPipeBaseData.eq(self, rhs)
 
@@ -127,7 +127,7 @@ class DivPipeSetupStage(DivPipeBaseStage, DivPipeCoreSetupStage):
 
     def __init__(self, pspec):
         self.pspec = pspec
-        print ("DivPipeSetupStage", pspec, pspec.core_config)
+        #print ("DivPipeSetupStage", pspec, pspec.core_config)
         DivPipeCoreSetupStage.__init__(self, pspec.core_config)
 
     def ispec(self):