fix multiply bit-width

[ieee754fpu.git] / src / ieee754 / fpcommon / postnormalise.py

diff --git a/src/ieee754/fpcommon/postnormalise.py b/src/ieee754/fpcommon/postnormalise.py
index 4812418419d9c01e764b97346d1e76ef8e39b675..4ab6639cf95da4d0c53d73ee5fbd6a349bc8c96e 100644 (file)
--- a/src/ieee754/fpcommon/postnormalise.py
+++ b/src/ieee754/fpcommon/postnormalise.py
@@ -71,7 +71,7 @@ class FPNorm1ModSingle(Elaboratable):
 
         espec = (len(i.z.e), True)
         ediff_n126 = Signal(espec, reset_less=True)
-        msr = MultiShiftRMerge(mwid, espec)
+        msr = MultiShiftRMerge(mwid+2, espec)
         m.submodules.multishift_r = msr
 
         m.d.comb += i.eq(self.i)