{x}{y} in verilog means x occurrences of y

[ieee754fpu.git] / src / ieee754 / fpdiv / mulAddRecFN.py

diff --git a/src/ieee754/fpdiv/mulAddRecFN.py b/src/ieee754/fpdiv/mulAddRecFN.py
index 4b02667dea4a127c849ebc0e23567d834b008f99..49dd1469b615bb45f72f565501f171af332d38a2 100644 (file)
--- a/src/ieee754/fpdiv/mulAddRecFN.py
+++ b/src/ieee754/fpdiv/mulAddRecFN.py
@@ -172,8 +172,9 @@ class mulAddRecFNToRaw_preMul(Elaboratable):
                                   sigSumWidth - 1)),
             # XXX check! {doSubMags ? ~sigC : sigC,
             #            {(sigSumWidth - sigWidth + 2){doSubMags}}};
-            extComplSigC.eq(Cat((sigSumWidth - sigWidth + 2){doSubMags}},
-                                Mux(doSubMags, ~sigC, sigC))),
+            sc = [doSubMags] * (sigSumWidth - sigWidth + 2) + \
+                                [Mux(doSubMags, ~sigC, sigC)]
+            extComplSigC.eq(Cat(*sc))
             # XXX check!  nmigen doesn't have >>> operator, only >>
             mainAlignedSigC.eq(extComplSigC >>> CAlignDist),
             grainAlignedSigC.eq(sigC<<CGrainAlign),