format code

[ieee754fpu.git] / src / ieee754 / fpdiv / test / test_fpsqrt_pipe_16.py

diff --git a/src/ieee754/fpdiv/test/test_fpsqrt_pipe_16.py b/src/ieee754/fpdiv/test/test_fpsqrt_pipe_16.py
index e1709c36ddeac745c4bb6143ee137af0da0ffd41..613823227e0eef1f92c6162a061a591d393bd5ce 100644 (file)
--- a/src/ieee754/fpdiv/test/test_fpsqrt_pipe_16.py
+++ b/src/ieee754/fpdiv/test/test_fpsqrt_pipe_16.py
@@ -1,7 +1,7 @@
 """ test of FPDIVMuxInOut
 """
 
-from ieee754.fpdiv.pipeline import (FPDIVMuxInOut,)
+from ieee754.fpdiv.pipeline import FPDIVMuxInOut
 from ieee754.fpcommon.test.case_gen import run_pipe_fp
 from ieee754.fpcommon.test import unit_test_half
 from ieee754.fpdiv.test.sqrt_data16 import regressions
@@ -23,5 +23,6 @@ class TestDivPipe(unittest.TestCase):
         run_pipe_fp(dut, 16, "sqrt16", unit_test_half, Float16, regressions,
                     sqrt, 100, single_op=True, opcode=opcode)
 
+
 if __name__ == '__main__':
     unittest.main()