copy context/roundz, a and b manually in fpmul align

[ieee754fpu.git] / src / ieee754 / fpmul / mul1.py

diff --git a/src/ieee754/fpmul/mul1.py b/src/ieee754/fpmul/mul1.py
index 763b8722d21166fc979dfa2be94edd00a33294d2..841efcdfed3df98d4fd0aebadb7feb3c3a47791e 100644 (file)
--- a/src/ieee754/fpmul/mul1.py
+++ b/src/ieee754/fpmul/mul1.py
@@ -65,7 +65,7 @@ class FPMulStage1(FPState):
 
     def __init__(self, pspec):
         FPState.__init__(self, "multiply_1")
-        width = pspec['width']
+        width = pspec.width
         self.mod = FPMulStage1Mod(pspec)
         self.out_z = FPNumBaseRecord(width, False)
         self.norm_stb = Signal()