convert to DynamicPipe (default class in PipelineSpec: SimpleHandshake)

[ieee754fpu.git] / src / ieee754 / fpmul / mulstages.py

diff --git a/src/ieee754/fpmul/mulstages.py b/src/ieee754/fpmul/mulstages.py
index 415ed8efdfaad8fe5a4c399a6dbb01b238694e55..2e96ed3b668e1151e5bf68e7271af6ba15f13132 100644 (file)
--- a/src/ieee754/fpmul/mulstages.py
+++ b/src/ieee754/fpmul/mulstages.py
@@ -3,21 +3,20 @@
 from nmigen import Module
 from nmigen.cli import main, verilog
 
-from nmutil.singlepipe import (StageChain, SimpleHandshake)
+from nmutil.singlepipe import StageChain
 
-from ieee754.fpcommon.fpbase import FPState
+from ieee754.pipeline import DynamicPipe
 from ieee754.fpcommon.denorm import FPSCData
 from ieee754.fpcommon.postcalc import FPAddStage1Data
-from .mul0 import FPMulStage0Mod
-from .mul1 import FPMulStage1Mod
+from ieee754.fpmul.mul0 import FPMulStage0Mod
+from ieee754.fpmul.mul1 import FPMulStage1Mod
 
 
-class FPMulStages(FPState, SimpleHandshake):
+class FPMulStages(DynamicPipe):
 
     def __init__(self, pspec):
-        FPState.__init__(self, "mulstages")
         self.pspec = pspec
-        SimpleHandshake.__init__(self, self) # pipeline is its own stage
+        super().__init__(pspec)
         self.m1o = self.ospec()
 
     def ispec(self):
@@ -42,8 +41,3 @@ class FPMulStages(FPState, SimpleHandshake):
     def process(self, i):
         return self.o
 
-    def action(self, m):
-        m.d.sync += self.m1o.eq(self.process(None))
-        m.next = "normalise_1"
-
-