use new FPBaseData as a "spec" (context), initialised with a dict (pspec)

[ieee754fpu.git] / src / nmutil / multipipe.py

diff --git a/src/nmutil/multipipe.py b/src/nmutil/multipipe.py
index efc1e005f572301d31648d0349f286be8c0bdbd9..82e3b8ae8088f0bbf799698b6e4c12086eb645e1 100644 (file)
--- a/src/nmutil/multipipe.py
+++ b/src/nmutil/multipipe.py
@@ -187,6 +187,8 @@ class CombMultiOutPipeline(MultiOutControlBase):
 
         # multiplexer id taken from n_mux
         mid = self.n_mux.m_id
+        print ("self.n_mux", self.n_mux)
+        print ("self.n_mux.m_id", self.n_mux.m_id)
 
         # temporaries
         p_valid_i = Signal(reset_less=True)
@@ -303,6 +305,7 @@ class CombMuxOutPipe(CombMultiOutPipeline):
         CombMultiOutPipeline.__init__(self, stage, n_len=n_len, n_mux=stage)
 
         # HACK: n-mux is also the stage... so set the muxid equal to input mid
+        print ("combmuxout", self.p.data_i.mid)
         stage.m_id = self.p.data_i.mid