CR FXM becomes a full mask.

[soc.git] / src / soc / decoder / decode2execute1.py

diff --git a/src/soc/decoder/decode2execute1.py b/src/soc/decoder/decode2execute1.py
index b3e6c691dfa743cd9f235453bebd9200d309a4a7..00a225ed3d2b5f5e459f13abf8aadd36177282f1 100644 (file)
--- a/src/soc/decoder/decode2execute1.py
+++ b/src/soc/decoder/decode2execute1.py
@@ -57,8 +57,8 @@ class Decode2ToOperand(RecordObject):
         self.ldst_mode  = Signal(LDSTMode, reset_less=True) # LD/ST mode
         self.traptype  = Signal(TT.size, reset_less=True) # trap main_stage.py
         self.trapaddr  = Signal(13, reset_less=True)
-        self.read_cr_whole = Signal(reset_less=True)
-        self.write_cr_whole = Signal(reset_less=True)
+        self.read_cr_whole = Data(8, "cr_rd") # CR full read mask
+        self.write_cr_whole = Data(8, "cr_wr") # CR full write mask
         self.write_cr0 = Signal(reset_less=True)