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Allow the formal engine to perform a same-cycle result in the ALU
[soc.git] / src / soc / decoder / isa / comparefixed.patch
diff --git a/src/soc/decoder/isa/comparefixed.patch b/src/soc/decoder/isa/comparefixed.patch
index fb0589415ddcc7cd47cc3b6bd5a894ad1bfefd2a..f20f4c0ec40959a4b4d9177828e96b816d2bb365 100644 (file)
--- a/src/soc/decoder/isa/comparefixed.patch
+++ b/src/soc/decoder/isa/comparefixed.patch
@@ -1,42 +1,6 @@
---- comparefixed.py.orig       2020-05-07 14:19:47.384535384 -0400
-+++ comparefixed.py    2020-05-07 14:19:11.220806542 -0400
-@@ -21,7 +21,7 @@
-             c = SelectableInt(value=0x2, bits=3)
-         else:
-             c = SelectableInt(value=0x1, bits=3)
--        CR[4 * BF + 32:4 * BF + 35 + 1] = concat(c, XER[SO])
-+        CR.si[4 * BF + 32:4 * BF + 35 + 1] = concat(c, XER[SO])
-         return (CR,)
- 
-     @inject()
-@@ -38,7 +38,7 @@
-             c = SelectableInt(value=0x2, bits=3)
-         else:
-             c = SelectableInt(value=0x1, bits=3)
--        CR[4 * BF + 32:4 * BF + 35 + 1] = concat(c, XER[SO])
-+        CR.si[4 * BF + 32:4 * BF + 35 + 1] = concat(c, XER[SO])
-         return (CR,)
- 
-     @inject()
-@@ -53,7 +53,7 @@
-             c = SelectableInt(value=0x2, bits=3)
-         else:
-             c = SelectableInt(value=0x1, bits=3)
--        CR[4 * BF + 32:4 * BF + 35 + 1] = concat(c, XER[SO])
-+        CR.si[4 * BF + 32:4 * BF + 35 + 1] = concat(c, XER[SO])
-         return (CR,)
- 
-     @inject()
-@@ -70,7 +70,7 @@
-             c = SelectableInt(value=0x2, bits=3)
-         else:
-             c = SelectableInt(value=0x1, bits=3)
--        CR[4 * BF + 32:4 * BF + 35 + 1] = concat(c, XER[SO])
-+        CR.si[4 * BF + 32:4 * BF + 35 + 1] = concat(c, XER[SO])
-         return (CR,)
- 
-     @inject()
-@@ -85,10 +85,10 @@
+--- comparefixed.py.orig       2020-05-15 10:02:00.087668937 -0400
++++ comparefixed.py    2020-05-15 12:32:36.834556205 -0400
+@@ -85,23 +85,22 @@
          else:
              in_range = le(src21lo, src1) & le(src1, src21hi) | le(src22lo, src1) & le(
                  src1, src22hi)
@@ -44,14 +8,18 @@
 -        CR[4 * BF + 33] = in_range
 -        CR[4 * BF + 34] = SelectableInt(value=0x0, bits=1)
 -        CR[4 * BF + 35] = SelectableInt(value=0x0, bits=1)
-+        CR.si[4 * BF + 32] = SelectableInt(value=0x0, bits=1)
-+        CR.si[4 * BF + 33] = in_range
-+        CR.si[4 * BF + 34] = SelectableInt(value=0x0, bits=1)
-+        CR.si[4 * BF + 35] = SelectableInt(value=0x0, bits=1)
++        CR[4 * BF + 32] = SelectableInt(value=0x0, bits=1)
++        CR[4 * BF + 33] = in_range
++        CR[4 * BF + 34] = SelectableInt(value=0x0, bits=1)
++        CR[4 * BF + 35] = SelectableInt(value=0x0, bits=1)
          return (CR,)
  
      @inject()
-@@ -98,10 +98,10 @@
+-    def op_cmpeqb(self, RB, CR):
+-        src1 = GPR[RA]
+-        src1 = src1[56:64]
++    def op_cmpeqb(self, RA, RB, CR):
++        src1 = RA[56:64]
          match = eq(src1, RB[0:8]) | eq(src1, RB[8:16]) | eq(src1, RB[16:24]) | eq(src1,
              RB[24:32]) | eq(src1, RB[32:40]) | eq(src1, RB[40:48]) | eq(src1, RB[48:56]
              ) | eq(src1, RB[56:64])
@@ -59,10 +27,19 @@
 -        CR[4 * BF + 33] = match
 -        CR[4 * BF + 34] = SelectableInt(value=0x0, bits=1)
 -        CR[4 * BF + 35] = SelectableInt(value=0x0, bits=1)
-+        CR.si[4 * BF + 32] = SelectableInt(value=0x0, bits=1)
-+        CR.si[4 * BF + 33] = match
-+        CR.si[4 * BF + 34] = SelectableInt(value=0x0, bits=1)
-+        CR.si[4 * BF + 35] = SelectableInt(value=0x0, bits=1)
++        CR[4 * BF + 32] = SelectableInt(value=0x0, bits=1)
++        CR[4 * BF + 33] = match
++        CR[4 * BF + 34] = SelectableInt(value=0x0, bits=1)
++        CR[4 * BF + 35] = SelectableInt(value=0x0, bits=1)
          return (CR,)
  
      comparefixed_instrs = {}
+@@ -136,7 +135,7 @@
+                 form='X',
+                 asmregs=[['BF', 'L', 'RA', 'RB']])
+     comparefixed_instrs['cmpeqb'] = instruction_info(func=op_cmpeqb,
+-                read_regs=OrderedSet(['RB']),
++                read_regs=OrderedSet(['RA', 'RB']),
+                 uninit_regs=OrderedSet(), write_regs=OrderedSet(['CR']),
+                 special_regs=OrderedSet(['CR']), op_fields=OrderedSet(['BF']),
+                 form='X',