dump regfile nicely
[soc.git] / src / soc / decoder / isa / test_caller.py
index fb227396bfeb8da0b771ca4708293032ae3ac16f..b1a90de3effcff430193ddfe749c445ef8b99163 100644 (file)
@@ -85,7 +85,7 @@ class DecoderTestCase(FHDLTestCase):
 
     def run_test_program(self, prog, initial_regs):
         simulator = self.run_tst(prog, initial_regs)
-        print(simulator.gpr)
+        simulator.gpr.dump()
         return simulator
 
 if __name__ == "__main__":