whoops swap regs and form

[soc.git] / src / soc / decoder / pseudo / pywriter.py

diff --git a/src/soc/decoder/pseudo/pywriter.py b/src/soc/decoder/pseudo/pywriter.py
index 4eb59439987f9585475171decfe6ca08bb28d6d6..c33f944cad45348a16307a3ce863aa5b6fffa513 100644 (file)
--- a/src/soc/decoder/pseudo/pywriter.py
+++ b/src/soc/decoder/pseudo/pywriter.py
@@ -1,6 +1,7 @@
 # python code-writer for OpenPOWER ISA pseudo-code parsing
 
 import os
+import sys
 from soc.decoder.pseudo.pagereader import ISA
 from soc.decoder.power_pseudo import convert_to_python
 from soc.decoder.orderedset import OrderedSet
@@ -25,6 +26,11 @@ class %s:
 
 """
 
+iinfo_template = """(%s, %s,
+                %s, %s,
+                %s, '%s',
+                %s)"""
+
 class PyISAWriter(ISA):
     def __init__(self):
         ISA.__init__(self)
@@ -65,11 +71,9 @@ class PyISAWriter(ISA):
                     f.write("\n")
                 # accumulate the instruction info
                 ops = repr(rused['op_fields'])
-                iinfo = """(%s, %s,
-                %s, %s,
-                %s, '%s')""" % (op_fname, rused['read_regs'],
+                iinfo = iinfo_template % (op_fname, rused['read_regs'],
                                 rused['uninit_regs'], rused['write_regs'],
-                                ops, d.form)
+                                ops, d.regs, d.form)
                 iinf += "    %s_instrs['%s'] = %s\n" % (pagename, page, iinfo)
             # write out initialisation of info, for ISACaller to use
             f.write("    %s_instrs = {}\n" % pagename)
@@ -95,22 +99,13 @@ class PyISAWriter(ISA):
             f.write('        }\n')
 
 
-
-
-
 if __name__ == '__main__':
     isa = PyISAWriter()
-    isa.write_pysource('fixedarith')
-    isa.write_pysource('sprset')
-    #isa.write_pysource('system')
+    if len(sys.argv) == 1: # quick way to do it
+        print (dir(isa))
+        sources = isa.page.keys()
+    else:
+        sources = sys.argv[1:]
+    for source in sources:
+        isa.write_pysource(source)
     isa.write_isa_class()
-    exit(0)
-    isa.write_pysource('stringldst')
-    isa.write_pysource('fixedshift')
-    isa.write_pysource('condition')
-    isa.write_pysource('fixedtrap')
-    isa.write_pysource('branch')
-    isa.write_pysource('fixedlogical')
-    isa.write_pysource('fixedstore')
-    isa.write_pysource('fixedload')
-    isa.write_pysource('comparefixed')