Fix broken test

[soc.git] / src / soc / decoder / test / test_power_decoder.py

diff --git a/src/soc/decoder/test/test_power_decoder.py b/src/soc/decoder/test/test_power_decoder.py
index 4960f44239b83af71ad79595fdec8040b58cc053..6578fa1d2d82ee888f19f102b463b439f3d4fe65 100644 (file)
--- a/src/soc/decoder/test/test_power_decoder.py
+++ b/src/soc/decoder/test/test_power_decoder.py
@@ -26,10 +26,13 @@ class DecoderTestCase(FHDLTestCase):
         rc_sel = Signal(RC)
         ldst_len = Signal(LdstLen)
         cry_in = Signal(CryIn)
+        bigendian = Signal()
+        comb += bigendian.eq(1)
 
         # opcodes = get_csv(csvname)
         m.submodules.dut = dut = create_pdecode()
-        comb += [dut.opcode_in.eq(opcode),
+        comb += [dut.raw_opcode_in.eq(opcode),
+                 dut.bigendian.eq(bigendian),
                  function_unit.eq(dut.op.function_unit),
                  in1_sel.eq(dut.op.in1_sel),
                  in2_sel.eq(dut.op.in2_sel),