* clarifying core function unit enable

[soc.git] / src / soc / experiment / compalu_multi.py

diff --git a/src/soc/experiment/compalu_multi.py b/src/soc/experiment/compalu_multi.py
index e2f8683a16fca02d44b73e68355807a0f7e84a9c..d1a4a325d348d3742a9311e782fa906bb283e2fe 100644 (file)
--- a/src/soc/experiment/compalu_multi.py
+++ b/src/soc/experiment/compalu_multi.py
@@ -267,7 +267,7 @@ class MultiCompUnit(RegSpecALUAPI, Elaboratable):
                     ok = data_r[fname]
             else:
                 data_r = Signal.like(lro, name=name, reset_less=True)
-            wrok.append(ok)
+            wrok.append(ok & self.busy_o)
             latchregister(m, lro, data_r, alu_pulsem, name + "_l")
             drl.append(data_r)