LDSTException now passing bits of SRR1 around to the Trap Pipeline

[soc.git] / src / soc / fu / trap / trap_input_record.py

diff --git a/src/soc/fu/trap/trap_input_record.py b/src/soc/fu/trap/trap_input_record.py
index 521ab590be1461051ea4ae9f4b265d00cd54ec82..107bc0f4c7e8d5f5f0275f7062c0681cf531eb2c 100644 (file)
--- a/src/soc/fu/trap/trap_input_record.py
+++ b/src/soc/fu/trap/trap_input_record.py
@@ -20,7 +20,7 @@ class CompTrapOpSubset(CompOpSubsetBase):
                   ('is_32bit', 1),
                   ('traptype', TT.size), # see trap main_stage.py, PowerDecoder2
                   ('trapaddr', 13),
-                  ('ldst_exc', len(LDSTException._exc_types)),
+                  ('ldst_exc', LDSTException.length), # blech
                   ]
 
         super().__init__(layout, name=name)