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add missing ext_irq signal to testissuer in microwatt compat mode
[soc.git]
/
src
/
soc
/
simple
/
issuer.py
diff --git
a/src/soc/simple/issuer.py
b/src/soc/simple/issuer.py
index 2fafc6626b315e84b88ef3e00fd77d068818a3c8..682e899d7430700c7d1d7f5764a0281790d4cb66 100644
(file)
--- a/
src/soc/simple/issuer.py
+++ b/
src/soc/simple/issuer.py
@@
-653,6
+653,7
@@
class TestIssuerBase(Elaboratable):
def external_ports(self):
if self.microwatt_compat:
ports = [self.core.o.core_terminate_o,
+ self.ext_irq,
self.alt_reset, # not connected yet
ClockSignal(),
ResetSignal(),