Added cray, simd diagrams. Slight correction to svp64_regs

[libreriscv.git] / svp64-primer / summary.tex

diff --git a/svp64-primer/summary.tex b/svp64-primer/summary.tex
index 17e671f94f4d2c1585acf59868a7766696237e13..4d55a301613e2d2b72cee4031951d57afd196cb9 100644 (file)
--- a/svp64-primer/summary.tex
+++ b/svp64-primer/summary.tex
@@ -64,7 +64,7 @@ includes the data width and the operation to perform.
 
 \begin{figure}[hb]
     \centering
-       \includegraphics[width=0.6\linewidth]{simd_axb}
+       \includegraphics[width=0.6\linewidth]{simd_axb.png}
        \caption{SIMD multiplication}
        \label{fig:simd_axb}
 \end{figure}
@@ -129,9 +129,9 @@ The Cray-1 had 8 Vector Registers with up to 64 elements (64-bit each).
 An early Draft of RVV supported overlaying the Vector Registers onto the
 Floating Point registers, similar to \acs{MMX}.
 
-\begin{figure}[hb]
+\begin{figure}[ht]
     \centering
-       \includegraphics[width=0.6\linewidth]{cray_vector_regs}
+       \includegraphics[width=0.6\linewidth]{cray_vector_regs.png}
        \caption{Cray Vector registers: 8 registers, 64 elements each}
        \label{fig:cray_vector_regs}
 \end{figure}
@@ -143,7 +143,7 @@ reason why Simple-V can be added on top of an existing Scalar ISA, and
 \textit{in particular} why there is no need to add Vector Registers or
 Vector instructions.
 
-\begin{figure}[hb]
+\begin{figure}[ht]
     \centering
        \includegraphics[width=0.6\linewidth]{svp64_regs.png}
        \caption{three instructions, same vector length, different element widths}